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[SYCL] Enable compiler rt builtin for SPIRV64 device code#21724

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jinge90 wants to merge 36 commits intointel:syclfrom
jinge90:enable_compiler_rt_builtin_spirv
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[SYCL] Enable compiler rt builtin for SPIRV64 device code#21724
jinge90 wants to merge 36 commits intointel:syclfrom
jinge90:enable_compiler_rt_builtin_spirv

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@jinge90 jinge90 commented Apr 10, 2026

This PR enables compiler-rt builtin library for SYCL device code. Currently, we only need __mulsc3/dc3 and __divsc3/dc3 for complex multiplication/division.

Signed-off-by: jinge90 <ge.jin@intel.com>
Signed-off-by: jinge90 <ge.jin@intel.com>
@jinge90 jinge90 requested review from a team and bader as code owners April 10, 2026 06:22
@jinge90 jinge90 requested a review from cperkinsintel April 10, 2026 06:22
@jinge90 jinge90 marked this pull request as draft April 10, 2026 06:22
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jinge90 commented Apr 10, 2026

Hi, @bader
We begin to enable compiler-rt builtin library for SYCL device code, this PR is the first one.
For compiler-rt builtin library, we only need 4 functions (__mulsc3, __muldc3, __divsc3, __divdc3) on Linux platform only.
We ported corresponding compiler-rt tests to SYCL e2e in #21622. This PR is still in progress, it only builds the libclang_rt.builtins.bc for device code, more work is needed to support linking it in compiler driver. I will ping you to review when all parts are finished.
Thanks very much.

jinge90 added 2 commits April 10, 2026 14:43
Signed-off-by: jinge90 <ge.jin@intel.com>
Signed-off-by: jinge90 <ge.jin@intel.com>
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bader commented Apr 10, 2026

Hi, @bader We begin to enable compiler-rt builtin library for SYCL device code, this PR is the first one. For compiler-rt builtin library, we only need 4 functions (__mulsc3, __muldc3, __divsc3, __divdc3) on Linux platform only. We ported corresponding compiler-rt tests to SYCL e2e in #21622. This PR is still in progress, it only builds the libclang_rt.builtins.bc for device code, more work is needed to support linking it in compiler driver. I will ping you to review when all parts are finished. Thanks very much.

Hi @jinge90. Thanks for tagging me. I suggest we move this PR to https://github.com/llvm/llvm-project/ to review these changes with compiler-rt code owners.

A couple of high-level notes/questions:

  1. I think we shouldn't switch from C to SYCL language compilation mode when we build for SPIR-V target. Have you tried using the C language mode?
  2. Do you have any estimation how hard it would be to enable the generic sources list?

Signed-off-by: jinge90 <ge.jin@intel.com>
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jinge90 commented Apr 13, 2026

Hi, @bader We begin to enable compiler-rt builtin library for SYCL device code, this PR is the first one. For compiler-rt builtin library, we only need 4 functions (__mulsc3, __muldc3, __divsc3, __divdc3) on Linux platform only. We ported corresponding compiler-rt tests to SYCL e2e in #21622. This PR is still in progress, it only builds the libclang_rt.builtins.bc for device code, more work is needed to support linking it in compiler driver. I will ping you to review when all parts are finished. Thanks very much.

Hi @jinge90. Thanks for tagging me. I suggest we move this PR to https://github.com/llvm/llvm-project/ to review these changes with compiler-rt code owners.

A couple of high-level notes/questions:

  1. I think we shouldn't switch from C to SYCL language compilation mode when we build for SPIR-V target. Have you tried using the C language mode?
  2. Do you have any estimation how hard it would be to enable the generic sources list?

Hi, @bader
"Have you tried using the C language mode?"
Could you provide the compiling commands to use 'C language mode' for SPIRV target? Do you mean "clang -target spirv64 -Xclang -fdeclare_spirv_builtins -emit-llvm ...."?

"Do you have any estimation how hard it would be to enable the generic sources list?"
It seems that there should be no big problems for building float and double builtins. I will try to build these builtins later and reply to you about the results. The most obvious problem about enabling these builtins is how to test them, current sycl compiler doesn't use them, so these builtins will be removed in device linking phase due to 'only-needed' linking behavior.

"I suggest we move this PR to https://github.com/llvm/llvm-project/ to review these changes with compiler-rt code owners."
I want to align with you and resolve all high-level problem/concern here and then submit to community review, is it acceptable? And also, we can integrate spirv libclang_builtins into sycl compiler and use our pre-ci to verify.

By the way, could you also help review #21745? I observed this when integrating libclang_rt.builtins.
Thanks very much.

jinge90 added 2 commits April 13, 2026 20:16
Signed-off-by: jinge90 <ge.jin@intel.com>
Signed-off-by: jinge90 <ge.jin@intel.com>
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bader commented Apr 13, 2026

Could you provide the compiling commands to use 'C language mode' for SPIRV target? Do you mean "clang -target spirv64 -Xclang -fdeclare_spirv_builtins -emit-llvm ...."?

I would expect clang -target spirv64 test.c to work. My understanding is that compiler-rt is built with -flto option. If this doesn't work, we should open an issue for that. Either we or AMD team could make this work.

"Do you have any estimation how hard it would be to enable the generic sources list?"
It seems that there should be no big problems for building float and double builtins. I will try to build these builtins later and reply to you about the results. The most obvious problem about enabling these builtins is how to test them, current sycl compiler doesn't use them, so these builtins will be removed in device linking phase due to 'only-needed' linking behavior.

compiler-rt library must be tested by compiler-rt tests, not SYCL tests!

jinge90 added 4 commits April 14, 2026 11:50
Signed-off-by: jinge90 <ge.jin@intel.com>
Signed-off-by: jinge90 <ge.jin@intel.com>
Signed-off-by: jinge90 <ge.jin@intel.com>
Signed-off-by: jinge90 <ge.jin@intel.com>
@jinge90 jinge90 changed the title [SYCL] Enable compiler rt builtin for SPIRV device code [SYCL] Enable compiler rt builtin for SPIRV64 device code Apr 15, 2026
jinge90 added 2 commits April 15, 2026 14:34
Signed-off-by: jinge90 <ge.jin@intel.com>
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jinge90 commented Apr 15, 2026

Could you provide the compiling commands to use 'C language mode' for SPIRV target? Do you mean "clang -target spirv64 -Xclang -fdeclare_spirv_builtins -emit-llvm ...."?

I would expect clang -target spirv64 test.c to work. My understanding is that compiler-rt is built with -flto option. If this doesn't work, we should open an issue for that. Either we or AMD team could make this work.

"Do you have any estimation how hard it would be to enable the generic sources list?"
It seems that there should be no big problems for building float and double builtins. I will try to build these builtins later and reply to you about the results. The most obvious problem about enabling these builtins is how to test them, current sycl compiler doesn't use them, so these builtins will be removed in device linking phase due to 'only-needed' linking behavior.

compiler-rt library must be tested by compiler-rt tests, not SYCL tests!

Hi, @bader
"I would expect clang -target spirv64 test.c to work. My understanding is that compiler-rt is built with -flto option. If this doesn't work, we should open an issue for that. Either we or AMD team could make this work."

I updated the compiler-rt CMake to use C language mode, the compiling commands is aligns with other GPU targets:
"clang --target=spirv64-unknown-unknown -DVISIBILITY_HIDDEN -I/export/users/gejin/PR/llvm/compiler-rt/lib/builtins/../../../third-party/siphash/include -O3 -DNDEBUG -nostdinc++ -Wno-c2y-extensions -fPIC -fno-builtin -fvisibility=hidden -fomit-frame-pointer -ffreestanding -flto -Xclang -fdeclare-spirv-builtins -DCOMPILER_RT_HAS_FLOAT16 -std=gnu11 -MD -MT CMakeFiles/clang_rt.builtins-spirv64.dir/divdc3.c.o -MF CMakeFiles/clang_rt.builtins-spirv64.dir/divdc3.c.o.d -o CMakeFiles/clang_rt.builtins-spirv64.dir/divdc3.c.o -c /export/users/gejin/PR/llvm/compiler-rt/lib/builtins/divdc3.c"
It turns out to work, the e2e tests for __mulsc3, __muldc3, __divsc3, __divdc3 pass on both GPU and CPU devices.

"compiler-rt library must be tested by compiler-rt tests, not SYCL tests!"
compiler-rt include e2e tests for all builtins target for normal CPU platform, we can't directly build and run them on GPU devices.
For __mulsc3, __divsc3, __muldc3, __divdc3, I ported corresponding compiler-rt e2e test to SYCL e2e test in #21622 to verify the correctness on GPU device.

"Do you have any estimation how hard it would be to enable the generic sources list?"
I locally built generic_list to SPIRV targets, 4 sources led to compilation failure, all of them are builtin for int128 type. compiler reported that 'int128_t' was not supported. All other 117 builtin function build was OK but I haven't ported their CPU e2e test to SYCL to verify them on GPU device. Do you think we should add the 117 builtin functions to the building list for SPIRV as well?

Thanks very much.

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